ReCoEng: Laboratory of Reconfigurable Computing Engineering
University of Victoria
British Columbia, CANADA

ReCoEng -- the Laboratory of Reconfigurable Computing Engineering is a division of the Department of Electrical and Computer Engineering of the University of Victoria, British Columbia, Canada. The ReCoEng Lab deals with the architecture, design, development, testing, and evaluation of reconfigurable arrays for computationally-intensive applications. Our main goal is to perform top-level research, and provide high-quality Master's and PhD education. In our web pages you can find information regarding our research program. You can also find information regarding the staff affiliated with our laboratory.


Reconfigurable Computing Paradigm

The emerge of hardware platforms which can be metamorphosed under software control has established Reconfigurable Computing (RC) as a viable computing paradigm in the last ten years. According to the RC paradigm, the main idea in improving the performance of a computing machine is to define customized computing resources and to dynamically swap them onto reconfigurable hardware as the application requires. This way, a virtually infinite amount of custom hardware can be emulated. Therefore, the RC paradigm seems to be the solution to design computing engines that have the performance of Application-Specific Integrated Circuits (ASIC), but the flexibility of General-Purpose Processors (GPP) in implementing a large class of applications.

As a general view, a computing machine working under the RC paradigm typically includes a GPP augmented with a Field-Programmable Gate Array (FPGA). Such a hybrid is generally referred to as a Field-Programmable Custom Computing Machine (FCCM). The synergism of GPP and FPGA can achieve orders of magnitude improvements in performance over a GPP alone, while preserving the flexibility of the programmed machines over ASICs in implementing a large number of applications. However, the FCCM performance in terms of speed and power may still be orders of magnitude lower than the performance of an ASIC.

Research Team

Graduate Students:

  1. Zorawar Singh BHATIA, BEng (University of Victoria, Canada).
  2. Fatemeh ESLAMI, BEng (Shahid Beheshti University, Tehran, Iran).
  3. Scott MILLER, BEng (Carleton University, Canada).
  4. Dian-Marie ROSS, BEng (University of Victoria, Canada).
  5. Kevin SEBASTIAN, BEng (University of Victoria, Canada).
  6. Babak ZAKERI, BSc (University of Tehran, Iran).

Professors, Affiliated Researchers, Collaborators, and Postdoctoral Fellows:

  1. Michael McGUIRE, BEng and MASc (University of Victoria, Canada), PhD (University of Toronto, Canada).
  2. Stephen NEVILLE, BEng, MASc, and PhD (University of Victoria, Canada) - Affiliated Researcher.
  3. Murugappan SENTHILVELAN, BEng (Annamalai University, Tamil Nadu, India), MSc and PhD (University of Wisconsin-Madison, U.S.A.) - Collaborator.
  4. Mihai SIMA, BEng/MEng and PhD (Polytechnic Institute of Bucharest, Romania), PhD (Delft University of Technology, The Netherlands).

Experimental Setup
Major Projects and Enrollment
  1. Level-Restoring Buffer with Unfolded Multiplexor (UMUX-LRB).
  2. Shift-Enabled Embedded Reconfigurable Array (ShEERA).
  3. Cryptography-Oriented Reconfigurable Array (CryptoRA).
  4. Hardware-Software Co-Design for Security.
  5. Reconfigurable Solutions for Wireless Applications.
  6. Reconfigurable Solutions for Automotive Applications.
  7. Image Processing with Transcendental Functions.
  8. Run-Time Reconfigurable Solutions for Embedded Systems.

Lab Meetings

Here we will post slides/discussions/papers related to recent or upcoming lab meetings.

Circuits under Fabrication and Test
  1. ShEERA v.1: test structures.

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Contact information

ReCoEng Lab chair: Dr. Mihai SIMA

Department of Electrical and Computer Engineering
University of Victoria
P.O. Box 3055 Stn CSC
Victoria, B.C. V8W 3P6

Telephone: +1 250 721 8680
Fax: +1 250 721 6052

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